The 36.5-50MHz ADF4002 PLL-VCO circuitry is completed.
The VCO having a tunning range of 36.5MHz ~ 50MHz from 0V to 5V, that translate to sensitivity of 2.7MHz/V.
The sensitivity of VCO is used to feed into ADIsimPLL tool, generate a second order loop filter of 1KHz bandwidth, 100kHz phase detector frequency and charge pump current 5mA.
The PLL is programmed to lock to 40.0MHz, some noise is observed.
Compare with the output spectrum of Agilent E4432 Signal generator, which is very nice and clean.
Is the PLL phase noise performance good enough? The noise is from VCO or loop filter?
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